Some types of electronic devices include a feedback loop circuit (e.g., refer to Patent Literature 1). In addition, some feedback loop circuits of this type include an adaptive processing section that performs predetermined adaptive processing in the feedback loop.
FIG. 1 is a diagram illustrating a conventional feedback loop circuit, which includes an adaptive processing section. In FIG. 1, an adder 11, an adaptive processing section 12, a selector 13, a first processing section 14, and a second processing section 15 are disposed in an identical feedback loop, forming the feedback loop circuit. In addition, this feedback loop circuit includes a route for bypassing the adaptive processing section 12, the route which can be selected by the selector 13.
In the feedback loop circuit in FIG. 1, when the selector 13 selects the adaptive processing section 12 side, a loop delay is the sum of a processing period of time in the adaptive processing section 12, and processing periods of time in the first processing section 14 and the second processing section 15.
In addition, a process is performed to determine whether or not the state of adaptive processing in the adaptive processing section 12 is effective, and when the state of the adaptive processing is considered to be substantially ineffective, the selector 13 is to select the route side by which the adaptive processing is bypassed. In this case, the loop delay is the sum of processing periods of time in the first processing section 14 and the second processing section 15, and it is thus possible to shorten the loop delay as compared with the case where the adaptive processing section 12 side is selected.